Recently, a semiconductor memory device that uses DRAM (dynamic access memory) cells as the memory cells, includes a self refresh function, and has a pin arrangement and interface, substantially compatible with an SRAM (static random access memory) has been developed and manufactured (refer to nonpatent document 1, for example). A clock-synchronous type high-speed SRAM of this type is employed for network devices, for example.
[Non-patent Document 1] Zensuke Matsuda, “System Memory Development Policy”, NEC DEVICE TECHNOLOGY INTERNATIONAL 2002 No. 65, searched on Jun. 28, 2003, Internet <URL> “http://www.necel.com/japanese/banner/tech/77/DTJ77NSZ.pdf”